Introduction and resistance chain for CPUs with heatspreader
I make a conscious distinction between CPUs with heatspreaders and direct-die configurations because the thermal resistance chain is fundamentally different. In a direct-die CPU, the heat source, i.e. the silicon die, is located directly under the external thermal paste and the cooler base. The chain is short, the number of series-connected partial resistors is low, the dispersion is correspondingly smaller and the role of the external paste is much more dominant.
In contrast, a CPU with a heatspreader results in a multi-stage chain of thermal resistors that all act in series. In simple terms, this chain can be described as follows: from the silicon die via the manufacturer’s internal TIM layer, further into the heat spreader made of nickel-coated copper, from there through the external thermal paste into the copper or nickel-plated copper cooler base and finally into the water circuit. In the accompanying diagram, these sections are plotted as individual segments of the overall route from the die to the cooling water, with the external paste visible as just one of several relatively small links.
This is precisely the core of the problem in the evaluation: The thermal resistance of the external thermal paste, i.e. R_th,TIM, only accounts for a small proportion of the total serial thermal resistance R_th,ges in a CPU with a heat spreader. The largest chunks lie in the internal construction of the processor itself. If two high-quality pastes with very similar R_th,TIM run against each other, they will only differ by fractions of a Kelvin in the context of the complete chain. Without a strictly controlled test environment, these differences disappear in the measurement scatter. For this reason, similarly powerful pastes can only be reliably ranked for CPUs with heatspreaders if all other parts of the chain are stable and reproducible, the cooling conditions are precisely defined and the evaluation is based on real measured thermal resistances and not on rough approximations.
Transparent calculation path with explicit variables and constants
For the further analysis, I use real thermal resistances measured with the TIMA system exkat to calculate practical CPU temperatures. I used a Ryzen 9 9700X for 65, 90 and 125 watts and a Ryzen 9 9950X with activated PBO for 200 watts as a reference. The water temperature of the cooling circuit is kept constant at T_Water = 30 °C with a laboratory chiller, so that all temperature differences can be directly attributed to the thermal resistances. The fact that I am now using 30°C instead of my usual 20°C is due to the intention of mapping real custom loop water cooling systems.
First, I define the relevant variables:
P_CPU in watts, the real power dissipation of the CPU
T_Water in degrees Celsius, the constant water temperature of the cooler
T_CPU in degrees Celsius, the temperature sought on the CPU surface (outside of the heatspreader)
R_th,internal in Kelvin per watt, the total internal thermal resistance from the die to the outside of the heatspreader
R_th,TIM in Kelvin per Watt, the measured thermal resistance of the external thermal paste
R_th,convection in Kelvin per watt, convective contact resistance from the inside of the cooler to the water
R_th,cooler in Kelvin per watt, the effective thermal resistance from the cooler base to the water
R_th,ges in Kelvin per watt, the total serial thermal resistance from the die to the water
The radiator resistance is made up of the conductive and convective components
R_th,convection = 1 / (h × A_fluid)
R_th,cooler = R_th,block R_th,convection
The serial resistance chain can then be written as:
R_th,ges = R_th,internal R_th,TIM R_th,cooler
The temperature at the heatspreader surface T_CPU is calculated in the simplest form via the product of total resistance and power loss, added to the water temperature:
T_CPU = T_water P_CPU × R_th,ges
Since in practice I keep the internal resistances and the cooler constant in a defined setup, R_th,TIM varies almost exclusively between two pastes. For the external paste, the specific contribution can also be physically formulated via thickness and area:
R_th,TIM = d / (λ × A_IHS)
where
d is the layer thickness of the paste (BLT) in meters,
λ is the thermal conductivity of the paste in watts per meter and Kelvin,
A_IHS is the effective contact area of the heat spreader to the paste in square meters.
In my case, the real calculation is done in two steps. First, the effective R_th,TIM,measured is determined for each paste with the TIMA system for a defined area A_IHS and a defined BLT. This R_th,TIM,measured then replaces the theoretical value d / (λ × A_IHS, which I only list here as a physical derivation. The temperatures are then calculated for the respective power points; I will do this using 125 watts as an example:
P_CPU,9700X,125 = 125 W
T_CPU,9700X,125 = T_water P_CPU,9700X,125 × R_th,ges
R_th,ges therefore always contains the sum of R_th,internal, R_th,TIM,measured and R_th,cooler. Since R_th,internal and R_th,cooler remain constant in the identical measurement setup, the temperature differences between two pastes arise exclusively via the difference in R_th,TIM,measured. The heatspreader area A_IHS is considered in two ways. On the one hand, it determines the effective contact area A_IHS of the paste in the TIMA structure and thus the measured R_th,TIM,measured. Secondly, it uses the heat flux density q” to determine how heavily the paste is loaded locally:
q” = P_CPU / A_IHS
The concrete numerical value of A_IHS depends on the respective CPU model and the exact geometry of the heatspreader, but it is firmly defined and constant in the measurement setup, so that the calculations for all pastes under consideration are carried out on an identical basis. I will not list specific numerical values for A_IHS here, as they are not explicitly stated in this text, but their consideration in the measurement and calculation path is an integral part of the setup.
Introduction to the new, practical temperature calculation
With this approach, I do not base the temperature calculation on theoretical data sheets or idealized thermal conductivities, but on real measured thermal resistances R_th,TIM,measured from the TIMA system, which correspond directly to the paste used, the real BLT and the effective heatspreader area A_IHS. In combination with a water circuit kept at 30 °C and stable boundary conditions for R_th,internal and R_th,cooler, this results in a practical, reproducible representation of the temperature conditions on the CPU surface.
This is particularly important for CPUs with heatspreaders because the proportion of the external paste in the total resistance R_th,ges is small and differences between similarly good pastes only become apparent in very narrow temperature windows. The new calculation method takes precisely this reality into account by explicitly considering the entire resistance chain and deriving the order of the pastes not from synthetic ideal values, but from verified R_th measurements.
Evaluation as a diagram using a good, an average and a poor thermal paste
47 Antworten
Kommentar
Lade neue Kommentare
Urgestein
1
Urgestein
1
Urgestein
1
Veteran
Urgestein
Urgestein
Veteran
Urgestein
1
1
Veteran
Mitglied
1
1
Urgestein
1
Alle Kommentare lesen unter igor´sLAB Community →